Basic ConceptsElectrical / Electronics SymbolsLogic Gates

Digital Logic Gates Symbols

Logic Gates Symbols

The following terms are used for basic Logic Gates symbols in the post.

ANSI: It stands for American National Standards Institute

DIN : It stands for Deutsches Institut für Normung’ which means ‘German Institute of Standardization

IEC : It stands for International Electrotechnical Commission

Digital Logic Gates Symbols

Digital Logic AND GateAND Gate Symbols

The AND Gate performs the logical (inclusive) conjunction (True output only if all True inputs). It provides output “HIGH” logic only when it’s all inputs are logic “HIGH”. And it provides logic “LOW” when one or all of the inputs are logic “LOW”.

Digital Logic OR GateOR Gate Symbols

The OR Gate performs the logical (inclusive) disjunction (True output for any True input) The output of OR gate is logic “HIGH” when one or more than one of its inputs is logic “HIGH”. The output only remains logic “LOW” when all of its inputs are logic “LOW”.

Digital Logic NOT GateNOT Gate Symbols

NOT gate, also known as logic Inverter, is a single input single output logic gate. It inverts the input logic. The output is logic “LOW” when the input is logic “HIGH” & the output is logic “HIGH” when the input is logic “LOW”.

Active Low NOT GateActive Low NOT Gate Symbol

The bubble before the gate shows that it is an active low logic gate. it has the same function as a common NOT gate.

Schmitt inverter:Schmitt inverter Symbol

The Schmitt inverter is a logic gate designed with the hysteresis phenomenon due to the positive feedback inside the gate. the main difference between generic inverter & Schmitt inverter is due to its threshold level. The former has fixed threshold that defines the LOW & HIGH Logic, the later has threshold level that resembles a BH hysteresis curve i.e. the threshold from Low to High & High to Low are different.Schmitt Inverter

Digital Buffer GateDigital Buffer Gate Symbol

A Buffer gate has single input & single output. It does not change the input logic. It is mainly used to increase the signal propagation delay.

Digital Tri-State Buffer GateDigital Tri-State Buffer Gate Symbol

Such type of Buffer gate has an extra control pin (also known as enable pin). It is used to control the flow of logic. If the control pin is HIGH the input logic flows out otherwise the output is “High Impedance State Z”

Digital Logic NAND GateNAND Gate Symbols

The NAND Gate is the Inverse of AND gate or “NOT of AND” gate. Its output is logic “High” when any of the input is logic “LOW” & its output is logic “LOW” when all of its inputs are logic “HIGH”.

Digital Logic NOR GateNOR Gate Symbols

NOR Gate is Negative or inverse of OR gate or “NOT of OR” gate. It gives logic “HIGH” when all of its inputs are logic “LOW” & gives logic “LOW” when any of the inputs are logic “High”.

Digital Logic XOR GateExclusive OR Gate - XOR Symbols

XOR Gate also known as Exclusive OR Gate, implements exclusive disjunction (Output true when only one input is true). The output of XOR gate is HIGH when only one input is HIGH otherwise the output is LOW.

Digital Logic XNOR GateExclusive NOR Gate - XNOR Symbols

The XNOR Gate also known as Exclusive NOR Gate, is an invert of XOR gate. It implements the function of equality. The output is True only if the input’s logic are same i.e. the output is HIGH only when all the inputs are “HIGH” or “LOW”

IMPLY GateIMPLY Gate Symbol

The IMPLY logic gate implements a “logical conditional”. It forms the statement “If A then B”.

The output of this gate is, “if the input A is true then input B is also true” So when A is True “HIGH” and B is True “HIGH”, the output is true “HIGH”. When A is true but B is false then the output is false. Now if the input A is false then automatically the output becomes true regardless of input B i.e. the output is True in both cases.



NIMPLY Logic gate has an inverted output of the IMPLY Logic gate. It implements the statement “If A but not B”. It means the output is true when and only when the input A is true but B is False.


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